Any of these examples can be put in a file in the same directory as your source files, named something like "Makefile" or "makefile".

# You can include comments with a # symbol.
# These .o's can come from any .c, .cpp or whatever you want, as long as make has a builtin rule for how to compile them.
OBJS=file1.o file2.o file3.o

# Note that some make variants will require a hard tab for indented lines.
# myprog is the thing we're building.  ${OBJS} is the things we're using as inputs when building myprog.
# ${CC} -o myprog ${OBJS} is how we actually build myprog from ${OBJS}.
# Each indented line is a shell command, with all the power and flexibility of Bourne Shell.  Each such line is run in a
# distinct shell, so variables you set in one aren't carried over to the next.
# You can also use $(CC), but that is less convenient when cutting and pasting, so I tend to use (EG) ${CC}.
myprog: ${OBJS}
	${CC} -o myprog ${OBJS}

CPPS=${wildcard *.cpp}
OBJS=${CPPS:.cpp=.o}

myprog: ${OBJS}
	${CXX} -o myprog ${OBJS}

# You can include comments with a # symbol.
OBJS=file1.o file2.o file3.o
CC=clang
CFLAGS=-ansi -pedantic -Wall

# Note that some make variants will require a hard tab for indented lines.
# We're putting myprog first (before file2.o), because make will by default try to build the first rule. You can
# invoke this rule with "make myprog" or just "make".
myprog: ${OBJS}
	${CC} -o myprog ${OBJS}

file2.o: file2.c file2.h

# A rule for removing all intermediate and final files, to get a clean recompile. You can invoke this with "make clean".
# The ".PHONY" says this isn't producing a file named clean - it's just so we can say "make clean" and get a side effect.
.PHONY: clean
clean:
	rm -f myprog ${OBJS}

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